WriteComm(0x11);     

Delay(120);                

WriteComm(0x36);     
WriteData(0x00);   

WriteComm(0x3A);     
WriteData(0x05);   

WriteComm(0xE7); //2 data lane 
WriteData(0x10);  

WriteComm(0xB2);     
WriteData(0x1E);   
WriteData(0x1F);   
WriteData(0x00);   
WriteData(0x33);   
WriteData(0x33);   

WriteComm(0xB7);     
WriteData(0x66);   

WriteComm(0xBB);//VCOM     
WriteData(0x25); //2E  

WriteComm(0xC0);     
WriteData(0x2C);   

WriteComm(0xC2);     
WriteData(0x01);   

WriteComm(0xC3);     
WriteData(0x19);   

WriteComm(0xC4);     
WriteData(0x20);   //VDV, 0x20:0v

WriteComm(0xC6);     
WriteData(0x13);   //0x13:60Hz  

WriteComm(0xD0);     
WriteData(0xA7);   
Delay(1);                //ms
WriteComm(0xD0);     
WriteData(0xA4);   
WriteData(0xA1);   

WriteComm(0xD6);     
WriteData(0xA1);   //sleep in?,gate???GND

WriteComm(0xE0);     
WriteData(0xF0);   
WriteData(0x08);   
WriteData(0x0C);   
WriteData(0x0C);   
WriteData(0x0B);   
WriteData(0x17);   
WriteData(0x2E);   
WriteData(0x43);   
WriteData(0x45);   
WriteData(0x3A);   
WriteData(0x15);   
WriteData(0x16);   
WriteData(0x2C);   
WriteData(0x33);   

WriteComm(0xE1);     
WriteData(0xF0);   
WriteData(0x03);   
WriteData(0x08);   
WriteData(0x06);   
WriteData(0x06);   
WriteData(0x03);   
WriteData(0x2E);   
WriteData(0x33);   
WriteData(0x44);   
WriteData(0x38);   
WriteData(0x13);   
WriteData(0x12);   
WriteData(0x2A);   
WriteData(0x2F);   

WriteComm(0xE4);     
WriteData(0x1D);   
WriteData(0x00);   
WriteData(0x00);   //?gate?????,bit4(TMG)??0

WriteComm(0x35);     
WriteData(0x00);

WriteComm(0x44);     
WriteData(0x00);


WriteComm(0x21);     

WriteComm(0x29);     

WriteComm(0x2A);     //Column Address Set
WriteData(0x00);   
WriteData(0x00);   //0
WriteData(0x00);   
WriteData(0xEF);   //239

WriteComm(0x2B);     //Row Address Set
WriteData(0x00);   
WriteData(0x00);   
WriteData(0x00);   
WriteData(0xEF);   //239

WriteComm(0x2C);